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ltm4603/ltm4603-1 1 4603fb 20v, 6a dc/dc module regulator with pll, output tracking and margining n telecom and networking equipment n servers n industrial equipment n point of load regulation n complete switch mode power supply n wide input voltage range: 4.5v to 20v n 6a dc typical, 8a peak output current n 0.6v to 5v output voltage n output voltage tracking and margining n remote sensing for precision regulation (ltm4603 only) n typical operating frequency: 1mhz n pll frequency synchronization n 1.5% regulation n current foldback protection (disabled at start-up) n pin compatible with the ltm4601 n pb-free (e4) rohs compliant package with gold finish pads n ultrafast transient response n current mode control n up to 93% efficiency at 5v in , 3.3v out n programmable soft-start n output overvoltage protection n small footprint, low profile (15mm 15mm 2.82mm) surface mount lga package 1.5v/6a power supply with 4.5v to 20v input efficiency vs load current with 12v in the ltm ? 4603 is a complete 6a step-down switch mode dc/dc module ? regulator with onboard switching con - troller, mosfets, inductor and all support components. the device is housed in a small surface mount 15mm 15mm 2.82mm lga package. operating over an input voltage range of 4.5v to 20v, the ltm4603 supports an output voltage range of 0.6v to 5v as well as output volt - age tracking and margining. the high efficiency design delivers 6a continuous current (8a peak). only bulk input and output capacitors are needed to complete the design. the low profile (2.82mm) and light weight (1.7g) package easily mounts on the unused space on the back side of pc boards for high density point of load regulation. the module regulator can be synchronized with an external clock for reducing undesirable frequency harmonics and allows polyphase ? operation for high load currents. a high switching frequency and adaptive on-time current mode architecture deliver a very fast transient response to line and load changes without sacrificing stability. an onboard remote sense amplifier can be used to accurately regulate an output voltage independent of load current. the onboard remote sense amplifier is not available in the ltm4603-1. the ltm4603/ltm4603-1 are pin compatible with the 12a ltm4601/ltm4601-1. l , lt, ltc, ltm, linear technology, the linear logo, module and polyphase are registered trademarks and ltpowercad is a trademark of linear technology corporation. all other trademarks are the property of their respective owners. v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood run comp intv cc drv cc mpgm track/ss pllin ltm4603 on/off 392k 40.2k margin control c out 4603 ta01a v out 1.5v 6a clock sync track/ss control 100pf c in v in f set pgnd sgnd 5% margin v in 4.5v to 20v load current (a) 0 efficiency (%) 60 90 95 100 2 4 5 4603 ta01b 50 45 80 70 55 85 40 75 65 1 3 6 7 12v in , 1.2v out 12v in , 1.5v out 12v in , 1.8v out 12v in , 2.5v out 12v in , 3.3v out 12v in , 5v out description features a pplications t ypical a pplication
ltm4603/ltm4603-1 2 4603fb intv cc , drv cc , v out_lcl , v out (v out 3.3v with remote sense amp)............................. C0.3v to 6v pllin, track/ss, mpgm, marg0, marg1, pgood, f set .............................. C0 .3v to intv cc + 0.3v run ............................................................. C 0.3v to 5v v fb , comp ................................................ C0 .3v to 2.7 v v in ............................................................. C0 .3v to 20v v osns + , v osns C .......................... C0 .3v to intv cc + 0.3v operating temperature range (note 2).... C40c to 85c junction temperature ........................................... 1 25c storage temperature range .................. C 55c to 125c (note 1) the l denotes the specifications which apply over the C40c to 85c operating temperature range (note 2), otherwise specifications are at t a = 25c, v in = 12v, per typical application (front page) configuration. symbol parameter conditions min typ max units v in(dc) input dc voltage l 4.5 20 v v out(dc) output voltage c in = 10f 2, c out = 2 100f x5r ceramic v in = 5v, v out = 1.5v, i out = 0a v in = 12v, v out = 1.5v, i out = 0a l l 1.478 1.478 1.5 1.5 1.522 1.522 v v input specifications v in(uvlo) undervoltage lockout threshold i out = 0a 3.2 4 v i inrush(vin) input inrush current at start-up i out = 0a. v out = 1.5v v in = 5v v in = 12v 0.6 0.7 a a lead free finish tray part marking* package description temperature range ? ltm4603ev#pbf ltm4603ev#pbf ltm4603v 118-lead (15mm 15mm 2.82mm) lga C40c to 85c ltm4603iv#pbf ltm4603iv#pbf ltm4603v 118-lead (15mm 15mm 2.82mm) lga C40c to 85c ltm4603ev-1#pbf ltm4603ev-1#pbf ltm4603v-1 118-lead (15mm 15mm 2.82mm) lga C40c to 85c ltm4603iv-1#pbf ltm4603iv-1#pbf ltm4603v-1 118-lead (15mm 15mm 2.82mm) lga C40c to 85c consult ltc marketing for parts specified with wider operating temperature ranges. *the temperature grade is identified by a label on the shipping container. ? see note 2. for more information on lead free part marking, go to: http://www.linear.com/leadfree/ this product is only offered in trays. for more information go to: http://www.linear.com/packaging/ p in c on f iguration a bsolute maxi m u m r atings marg1 drv cc v fb pgood sgnd v osns + /nc2* diffv out /nc3* v out_lcl v osns ? /nc1* v in pgnd v out f set marg0 run comp mpgm pllin intv cc track/ss lga package 118-lead (15mm 15mm 2.82mm) top view t jmax = 125c, ja = 15c/w, jc = 6c/w ja derived from 95mm 76mm pcb with 4 layers, weight = 1.7g *ltm4603-1 only o r d er i n f or m ation e lectrical c haracteristics
ltm4603/ltm4603-1 3 4603fb symbol parameter conditions min typ max units i q(vin,noload) input supply bias current v in = 12v, no switching v in = 12v, v out = 1.5v, switching continuous v in = 5v, no switching v in = 5v, v out = 1.5v, switching continuous shutdown, run = 0, v in = 12v 3.8 25 2.5 43 22 ma ma ma ma a i s(vin) input supply current v in = 12v, v out = 1.5v, i out = 6a v in = 12v, v out = 3.3v, i out = 6a v in = 5v, v out = 1.5v, i out = 6a 0.92 1.83 2.12 a a a intv cc v in = 12v, run > 2v no load 4.7 5 5.3 v output specifications i outdc output continuous current range v in = 12v, v out = 1.5v (note 5) 0 6 a ?v out(line) v out line regulation accuracy v out = 1.5v, i out = 0a, v in = 4.5v to 20v l 0.3 % ?v out(load) v out load regulation accuracy v out = 1.5v, i out = 0a to 6a (note 5) v in = 12v, with remote sense amp v in = 12v, ltm4603-1 l l 0.25 0.5 % % v out(ac) output ripple voltage i out = 0a, c out = 2 100f x5r ceramic v in = 12v, v out = 1.5v v in = 5v, v out = 1.5v 10 10 mv p-p mv p-p f s output ripple voltage frequency i out = 3a, v in = 12v, v out = 1.5v 1000 khz v out(start) turn-on overshoot c out = 200f, v out = 1.5v, i out = 0a, track/ss = 10nf v in = 12v v in = 5v 20 20 mv mv t start turn-on time c out = 200f, v out = 1.5v, track/ss = open, i out = 1a resistive load v in = 12v v in = 5v 0.5 0.5 ms ms v outls peak deviation for dynamic load load: 0% to 50% to 0% of full load, c out = 2 22f ceramic, 470f 4v sanyo poscap v in = 12v v in = 5v 35 35 mv mv t settle settling time for dynamic load step load: 0% to 50% to 10% of full load v in = 12v 25 s i outpk output current limit c out = 2 100f x5r ceramic v in = 12v, v out = 1.5v v in = 5v, v out = 1.5v 8 8 a a remote sense amp (ltm4603 only, not supported in the ltm4603-1) (note 3) v osns + , v osns C cm range common mode input voltage range v in = 12v, run > 2v 0 intv cc C 1 v diffv out range output voltage range v in = 12v, diffv out load = 100k 0 intv cc C 1 v v os input offset voltage magnitude 1.25 mv av differential gain 1 v/v gbp gain bandwidth product 3 mhz sr slew rate 2 v/s the l denotes the specifications which apply over the C40c to 85c operating temperature range (note 2), otherwise specifications are at t a = 25c, v in = 12v, per typical application (front page) configuration. electrical characteristics
ltm4603/ltm4603-1 4 4603fb symbol parameter conditions min typ max units r in input resistance v osns + to gnd 20 kw cmrr common mode rejection ratio 100 db control stage v fb error amplifier input voltage accuracy i out = 0a, v out = 1.5v l 0.594 0.6 0.606 v v run run pin on/off threshold 1 1.5 1.9 v i track/ss soft-start charging current v track/ss = 0v C1 C1.5 C2 a t on(min) minimum on time (note 4) 50 100 ns t off(min) minimum off time (note 4) 250 400 ns r pllin pllin input resistance 50 k w i drvcc current into drv cc pin v out = 1.5v, i out = 1a, drv cc = 5v 20 27 ma r fbhi resistor between v out_lcl and v fb 60.098 60.4 60.702 k w v mpgm margin reference voltage 1.18 v v marg0 , v marg1 marg0, marg1 voltage thresholds 1.4 v pgood output v fbh pgood upper threshold v fb rising 7 10 13 % v fbl pgood lower threshold v fb falling C7 C10 C13 % v fb(hys) pgood hysteresis v fb returning (note 4) 1.5 3 % v pgl pgood low voltage i pgood = 5ma 0.15 0.4 v note 1: stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. exposure to any absolute maximum rating condition for extended periods may affect device reliability and lifetime. note 2: the ltm4603/ltm4603-1 is tested under pulsed load conditions such that t j t a . the ltm4603e/ltm4603e-1 are guaranteed to meet performance specifications from 0c to 85c. specifications over the C40c to 85c operating temperature range are assured by design, characterization and correlation with statistical process controls. the ltm4603i/ltm4603i-1 are guaranteed over the C40c to 85c operating temperature range. note 3: remote sense amplifier recommended for 3.3v output. note 4: 100% tested at wafer sort only. note 5: see output current derating curves for different v in , v out and t a . the l denotes the specifications which apply over the C40c to 85c operating temperature range (note 2), otherwise specifications are at t a = 25c, v in = 12v, per typical application (front page) configuration. electrical characteristics
ltm4603/ltm4603-1 5 4603fb t ypical p er f or m ance c haracteristics efficiency vs load current with 5v in efficiency vs load current with 12v in efficiency vs load current with 20v in 1.2v transient response 1.5v transient response 2.5v transient response 3.3v transient response (see figure 18 for all curves) 1.8v transient response load current (a) 0 50 efficiency (%) 55 65 70 75 100 85 2 4 5 4603 g01 60 90 95 80 1 3 6 7 5v in , 0.6v out 5v in , 1.2v out 5v in , 1.5v out 5v in , 1.8v out 5v in , 2.5v out 5v in , 3.3v out load current (a) 0 efficiency (%) 60 90 95 100 2 4 5 4603 g02 50 45 80 70 55 85 40 75 65 1 3 6 7 12v in , 1.2v out 12v in , 1.5v out 12v in , 1.8v out 12v in , 2.5v out 12v in , 3.3v out 12v in , 5v out load current (a) 0 efficiency (%) 55 85 90 95 2 4 5 4603 g03 45 75 65 50 80 40 70 60 1 3 6 7 20v in , 1.5v out 20v in , 1.8v out 20v in , 2.5v out 20v in , 3.3v out 20v in , 5v out load step 1a/div v out 50mv/div 25s/div 4603 g04 1.2v at 3a/s load step c out : 1 22f, 6.3v ceramic 1 330f, 4v sanyo poscap load step 1a/div v out 50mv/div 25s/div 4603 g05 1.5v at 3a/s load step c out : 1 22f, 6.3v ceramic 1 330f, 4v sanyo poscap load step 1a/div v out 50mv/div 25s/div 4603 g06 1.8v at 3a/s load step c out : 1 22f, 6.3v ceramic 1 330f, 4v sanyo poscap load step 1a/div v out 50mv/div 25s/div 4603 g07 2.5v at 3a/s load step c out : 1 22f, 6.3v ceramic 1 330f, 4v sanyo poscap load step 1a/div v out 50mv/div 25s/div 4603 g08 3.3v at 3a/s load step c out : 1 22f, 6.3v ceramic 1 330f, 4v sanyo poscap
ltm4603/ltm4603-1 6 4603fb start-up, i out = 6a (resistive load) start-up, i out = 0a v in to v out step-down ratio short-circuit protection, i out = 0a short-circuit protection, i out = 6a v out 0.5v/div i in 0.5a/div 1ms/div 4603 g09 v in = 12v v out = 1.5v c out = 1 22f, 6.3v ceramic 1 330f, 4v sanyo poscap soft-start = 3.9nf v out 0.5v/div i in 0.5a/div 1ms/div 4603 g10 v in = 12v v out = 1.5v c out = 1 22f, 6.3v ceramic 1 330f, 4v sanyo poscap soft-start = 3.9nf v out 0.5v/div i in 2a/div 100s/div 4603 g11 v in = 12v v out = 1.5v c out = 1 22f, 6.3v ceramic 1 330f, 4v sanyo poscap soft-start = 3.9nf v out 0.5v/div i in 2a/div 100s/div 4603 g12 v in = 12v v out = 1.5v c out = 1 22f, 6.3v ceramic 1 330f, 4v sanyo poscap soft-start = 3.9nf input voltage (v) 0 output voltage (v) 3.0 4.0 5.5 5.0 16 4603 g13 2.0 1.0 2.5 3.5 4.5 1.5 0.5 0 42 86 12 14 18 10 20 3.3v output with 82.5k from v out to f set 5v output with 150k resistor added from f set to gnd 5v output with no resistor added from f set to gnd 2.5v output 1.8v output 1.5v output 1.2v output typical per f or m ance characteristics (see figure 18 for all curves)
ltm4603/ltm4603-1 7 4603fb p in functions (see package description for pin assignment) v in (bank 1): power input pins. apply input voltage be- tween these pins and pgnd pins. recommend placing input decoupling capacitance directly between v in pins and pgnd pins. v out (bank 3): power output pins. apply output load between these pins and pgnd pins. recommend placing output decoupling capacitance directly between these pins and pgnd pins. see figure 15. pgnd (bank 2): power ground pins for both input and output returns. v osns C (pin m12): (C) input to the remote sense ampli- fier. this pin connects to the ground remote sense point. the remote sense amplifier is used for v out 3.3v. tie to intv cc if not used. nc1 (pin m12): no internal connection on the ltm4603-1. v osns + (pin j12): (+) input to the remote sense ampli- fier. this pin connects to the output remote sense point. the remote sense amplifier is used for v out 3.3v. tie to ground if not used. nc2 (pin j12): no internal connection on the ltm4603-1. diffv out (pin k12): output of the remote sense ampli- fier. this pin connects to the v out_lcl pin. leave floating if remote sense amplifier is not used. nc3 (pin k12): no internal connection on the ltm4603-1. drv cc (pin e12): this pin normally connects to intv cc for powering the internal mosfet drivers. this pin can be biased up to 6v from an external supply with about 50ma capability, or an external circuit shown in figure 16. this improves efficiency at the higher input voltages by reducing power dissipation in the module. intv cc (pin a7): this pin is for additional decoupling of the 5v internal regulator. pllin (pin a8): external clock synchronization input to the phase detector. this pin is internally terminated to sgnd with a 50k resistor. apply a clock with a high level above 2v and below intv cc . see the applications information section. track/ss (pin a9): output voltage tracking and soft- start pin. when the module is configured as a master output, then a soft-start capacitor is placed on this pin to ground to control the master ramp rate. a soft-start capacitor can be used for soft-start turn on as a stand alone regulator. slave operation is performed by putting a resistor divider from the master output to ground, and connecting the center point of the divider to this pin. see the applications information section. mpgm (pin a12): programmable margining input. a re- sistor from this pin to ground sets a current that is equal to 1.18v/r. this current multiplied by 10k w will equal a value in millivolts that is a per centage of the 0.6v refer - ence voltage. see applications information. to parallel ltm4603s, each requires an individual mpgm resistor. do not tie mpgm pins together. marg1 drv cc v fb pgood sgnd v osns + (nc2, ltm4603-1) diffv out (nc3, ltm4603-1) v out_lcl v osns ? (nc1, ltm4603-1) v in bank 1 pgnd bank 2 a b c d e f g h j k l m v out bank 3 f set marg0 run comp mpgm pllin intv cc track/ss 1 2 3 4 5 6 7 top view 8 9 10 11 12
ltm4603/ltm4603-1 8 4603fb f set (pin b12): frequency set internally to 1mhz. an external resistor can be placed from this pin to ground to increase frequency. see the applications information section for frequency adjustment. v fb (pin f12): the negative input of the error ampli- fier. internally, this pin is connected to v out_lcl with a 60.4k precision resistor. different output voltages can be programmed with an additional resistor between v fb and sgnd pins. see the applications information section. marg0 (pin c12): this pin is the lsb logic input for the margining function. together with the marg1 pin it will determine if margin high, margin low or no margin state is applied. the pin has an internal pull-down resistor of 50k. see the applications information section. marg1 (pin d12): this pin is the msb logic input for the margining function. together with the marg0 pin it will determine if margin high, margin low or no margin state is applied. the pin has an internal pull-down resistor of 50k. see the applications information section. sgnd (pin h12): signal ground. this pin connects to pgnd at output capacitor point. comp (pin a11): current control threshold and error amplifier compensation point. the current comparator threshold increases with this control voltage. the voltage ranges from 0v to 2.4v with 0.7v corresponding to zero sense voltage (zero current). pgood (pin g12): output voltage power good indicator. open-drain logic output that is pulled to ground when the output voltage is not within 10% of the regulation point, after a 25s power bad mask timer expires. run (pin a10): run control pin. a voltage above 1.9v will turn on the module, and when below 1v, will turn off the module. a programmable uvlo function can be accomplished by connecting to a resistor divider from v in to ground. see figure 1. this pin has a 5.1v zener to ground. maximum pin voltage is 5v. limit current into the run pin to less than 1ma. v out_lcl (pin l12): v out connects directly to this pin to bypass the remote sense amplifier, or diffv out connects to this pin when the remote sense amplifier is used. v out_lcl can be connected to v out on the ltm4603-1. v out is internally connected to v out_lcl through 50 w in the ltm4603-1. pin f unctions (see package description for pin assignment)
ltm4603/ltm4603-1 9 4603fb figure 1. simplified ltm4603/ltm4603-1 block diagram s i m pli f ie d b lock diagra m decoupling r equire m ents symbol parameter conditions min typ max units c in external input capacitor requirement (v in = 4.5v to 20v, v out = 1.5v) i out = 6a 20 f c out external output capacitor requirement (v in = 4.5v to 20v, v out = 1.5v) i out = 6a 100 200 f t a = 25c, v in = 12v. use figure 1 configuration. + internal comp sgnd comp pgood uvlo function run v in v out_lcl >1.9v = on <1v = off max = 5v marg1 marg0 mpgm pllin c ss intv cc drv cc track/ss v fb f set 50k r2 r1 33.2k r set 40.2k 50k 60.4k v out 1m (50, ltm4603-1) 5.1v zener power control q1 v in 4.5v to 20v v out 1.5v 6a q2 10k 10k 10k 50k 10k intv cc + ? 22f 1.5f c in + c out pgnd v osns ? not included in the ltm4603-1 v osns ? = nc1 v osns + = nc2 diffv out = nc3 v osns + diffv out 4603 f01 4.7f 1h
ltm4603/ltm4603-1 10 4603fb power module description the ltm4603 is a standalone nonisolated switching mode dc/dc power supply. it can deliver up to 6a of dc output current with few external input and output capacitors. this module provides precisely regulated output voltage programmable via one external resistor from 0.6v dc to 5.0v dc over a 4.5v to 20v wide input voltage. the typical application schematic is shown in figure 18. the ltm4603 has an integrated constant on-time current mode regulator, ultralow r ds(on) fets with fast switching speed and integrated schottky diodes. the typical switching frequency is 1mhz at full load. with current mode control and internal feedback loop compensation, the ltm4603 module has sufficient stability margins and good transient performance under a wide range of operating conditions and with a wide range of output capacitors, even all ceramic output capacitors. current mode control provides cycle-by-cycle fast current limit. besides, foldback current limiting is provided in an overcurrent condition while v fb drops. internal overvolt - age and undervoltage comparators pull the open-drain pgood output low if the output feedback voltage exits a 10% window around the regulation point. furthermore, in an overvoltage condition, internal top fet q1 is turned off and bottom fet q2 is turned on and held on until the overvoltage condition clears. pulling the run pin below 1v forces the controller into its shutdown state, turning off both q1 and q2. at low load current, the module works in continuous current mode by default to achieve minimum output ripple voltage. when drv cc pin is connected to intv cc an integrated 5v linear regulator powers the internal gate drivers. if a 5v external bias supply is applied on the drv cc pin, then an efficiency improvement will occur due to the reduced power loss in the internal linear regulator. this is especially true at the high end of the input voltage range. the ltm4603 has a very accurate differential remote sense amplifier with very low offset. this provides for very accurate output voltage measurement at the load. the mpgm pin, marg0 pin and marg1 pin are used to support voltage margining, where the percentage of margin is programmed by the mpgm pin, and the marg0 and marg1 select margining. the pllin pin provides frequency synchronization of the device to an external clock. the track/ss pin is used for power supply tracking and soft-start programming. o peration
ltm4603/ltm4603-1 11 4603fb the typical ltm4603 application circuit is shown in fig - ure 18. external component selection is primarily deter - mined by the maximum load current and output voltage. refer to table 2 for specific external capacitor requirements for a particular application. v in to v out step-down ratios there are restrictions in the maximum v in and v out step down ratio that can be achieved for a given input voltage. these constraints are shown in the typical performance characteristics curves labeled v in to v out step-down ratio. note that additional thermal derating may apply. see the thermal considerations and output current derating section of this data sheet. output voltage programming and margining the pwm controller has an internal 0.6v reference voltage. as shown in the block diagram, a 1m and a 60.4k 0.5% internal feedback resistor connects v out and v fb pins together. the v out_lcl pin is connected between the 1m and the 60.4k resistor. the 1m resistor is used to protect against an output overvoltage condition if the v out_lcl pin is not connected to the output, or if the remote sense amplifier output is not connected to v out_lcl . in these cases, the output voltage will default to 0.6v. adding a resistor r set from the v fb pin to sgnd pin programs the output voltage: v out = 0.6 60.4k + r set r set table 1. r set standard 1% resistor values vs v out r set (k w ) open 60.4 40.2 30.1 25.5 19.1 13.3 8.25 v out (v) 0.6 1.2 1.5 1.8 2 2.5 3.3 5 the mpgm pin programs a current that when multiplied by an internal 10k resistor sets up the 0.6v reference offset for margining. a 1.18v reference divided by the r pgm resistor on the mpgm pin programs the current. calculate v out(margin) : v out(margin) = %v out 100 ? v out where %v out is the percentage of v out you want to margin, and v out(margin) is the margin quantity in volts: r pgm = v out 0.6v ? 1.18v v out(margin) ? 10k where r pgm is the resistor value to place on the mpgm pin to ground. the margining voltage, v out(margin) , will be added or subtracted from the nominal output voltage as determined by the state of the marg0 and marg1 pins. see the truth table below: marg1 marg0 mode low low no margin low high margin up high low margin down high high no margin input capacitors ltm4603 module should be connected to a low ac imped - ance dc source. input capacitors are required to be placed adjacent to the module. in figure 18, the 10f ceramic input capacitors are selected for their ability to handle the large rms current into the converter. an input bulk capacitor of 100f is optional. this 100f capacitor is only needed if the input source impedance is compromised by long inductive leads or traces. for a buck converter, the switching duty-cycle can be estimated as: d = v out v in without considering the inductor ripple current, the rms current of the input capacitor can be estimated as: i cin(rms) = i out(max) % ? d ? (1 ? d) in the above equation, % is the estimated efficiency of the power module. c in can be a switcher-rated electrolytic aluminum capacitor, os-con capacitor or high value ce - ramic capacitor. note the capacitor ripple current ratings are often based on temperature and hours of life. this makes it advisable to properly derate the input capacitor, a pplications i n f or m ation
ltm4603/ltm4603-1 12 4603fb or choose a capacitor rated at a higher temperature than required. always contact the capacitor manufacturer for derating requirements. in figure 18, the 10f ceramic capacitors are together used as a high frequency input decoupling capacitor. in a typical 6a output application, two very low esr, x5r or x7r, 10f ceramic capacitors are recommended. these decoupling capacitors should be placed directly adjacent to the module input pins in the pcb layout to minimize the trace inductance and high frequency ac noise. each 10f ceramic is typically good for 2a to 3a of rms ripple current. refer to your ceramics capacitor catalog for the rms current ratings. multiphase operation with multiple ltm4603 devices in parallel will lower the effective input rms ripple current due to the interleaving operation of the regulators. application note 77 provides a detailed explanation. refer to figure 2 for the input capacitor ripple current reduction as a func - tion of the number of phases. the figure provides a ratio of rms ripple current to dc load current as a function of duty cycle and the number of paralleled phases. pick the corresponding duty cycle and the number of phases to arrive at the correct ripple current value. for example, the 2-phase parallel ltm4603 design provides 10a at 2.5v output from a 12v input. the duty cycle is dc = 2.5v/12v = 0.21. the 2-phase curve has a ratio of ~0.25 for a duty cycle of 0.21. this 0.25 ratio of rms ripple current to a dc load current of 10a equals ~2.5a of input rms ripple current for the external input capacitors. output capacitors the ltm4603 is designed for low output ripple voltage. the bulk output capacitors defined as c out are chosen with low enough effective series resistance (esr) to meet the output ripple voltage and transient requirements. c out can be a low esr tantalum capacitor, a low esr polymer capacitor or a ceramic capacitor. the typical capacitance is 200f if all ceramic output capacitors are used. additional output filtering may be required by the system designer if further reduction of output ripple or dynamic transient spikes is required. table 2 shows a matrix of different output voltages and output capacitors to minimize the voltage droop and overshoot during a 2.5a/s transient. the table optimizes total equivalent esr and total bulk capacitance to maximize transient performance. multiphase operation with multiple ltm4603 devices in parallel will lower the effective output ripple current due to the interleaving operation of the regulators. for example, each ltm4603s inductor current in a 12v to 2.5v multi - phase design can be read from the inductor ripple current vs duty cycle graph (figure 3). the large ripple current at low duty cycle and high output voltage can be reduced by adding an external resistor from f set to ground which increases the frequency. if we choose the duty cycle of dc = 2.5v/12v = 0.21, the inductor ripple current for 2.5v output at 21% duty cycle is ~3a in figure 3. figure 2. normalized input rms ripple current vs duty cycle for one to six modules (phases) figure 3. inductor ripple current vs duty cycle applications in f or m ation duty cycle (v out /v in ) 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 0.6 0.5 0.4 0.3 0.2 0.1 0 4603 f02 rms input ripple current dc load current 6-phase 4-phase 3-phase 2-phase 1-phase duty cycle (v out /v in ) 0 0 i l (a) 1 2 3 4 5 0.2 0.4 0.6 0.8 4603 f03 2.5v output 5v output 1.8v output 1.5v output 1.2v output 3.3v output with 82.5k added from v out to f set 5v output with 150k added from f set to gnd
ltm4603/ltm4603-1 13 4603fb figure 4 provides a ratio of peak-to-peak output ripple cur - rent to the inductor current as a function of duty cycle and the number of paralleled phases. pick the corresponding duty cycle and the number of phases to arrive at the correct output ripple current ratio value. if a 2-phase operation is chosen at a duty cycle of 21%, then 0.6 is the ratio. this 0.6 ratio of output ripple current to inductor ripple of 3a equals 8a of effective output ripple current. refer to application note 77 for a detailed explanation of output ripple current reduction as a function of paralleled phases. the output ripple voltage has two components that are related to the amount of bulk capacitance and effective series resistance (esr) of the output bulk capacitance. therefore, the output ripple voltage can be calculated with the known effective output ripple current. the equation: v out(p-p) (i l /(8 ? f ? m ? c out ) + esr ? i l ), where f is frequency and m is the number of parallel phases. this calculation process can be easily accomplished by ltpowercad?. fault conditions: current limit and overcurrent foldback the ltm4603 has a current mode controller which inher - ently limits the cycle-by-cycle inductor current, not only in steady-state operation but also in response to transients. to further limit current in the event of an overload condi - tion, the ltm4603 provides foldback current limiting. if the output voltage falls by more than 50%, then the maximum output current is progressively lowered to about one sixth of its full current limit value. soft-start and tracking the track/ss pin provides a means to either soft-start the regulator or track it to a different power supply. a capacitor on this pin will program the ramp rate of the output voltage. a 1.5a current source will charge up the external soft-start capacitor to 80% of the 0.6v internal voltage reference plus or minus any margin delta. this will figure 4. normalized output ripple current vs duty cycle, dlr = v o t/l i applications in f or m ation duty cycle (v o /v in ) 0.1 0.15 0.2 0.25 0.350.3 0.4 0.45 0.5 0.55 0.6 0.65 0.7 0.75 0.8 0.85 0.9 1.00 0.95 0.90 0.85 0.80 0.75 0.70 0.65 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0.20 0.15 0.10 0.05 0 4603 f04 6-phase 4-phase 3-phase 2-phase 1-phase peak-to-peak output ripple current dir ratio =
ltm4603/ltm4603-1 14 4603fb control the ramp of the internal reference and the output voltage. the total soft-start time can be calculated as: t softstart = 0.8 ? 0.6v v out(margin) ( ) ? c ss 1.5a when the run pin falls below 1.5v, then the track/ss pin is reset to allow for proper soft-start control when the regulator is enabled again. current foldback and forced continuous mode are disabled during the soft-start pro- cess. the soft-start function can also be used to control the output ramp up time, so that another regulator can be easily tracked to it. output voltage tracking output voltage tracking can be programmed externally using the track/ss pin. the output can be tracked up and down with another regulator. figure 5 shows an ex- ample of coincident tracking where the master regulator s output is divided down with an external resistor divider that is the same as the slave regulators feedback divider. the master output must be greater than the slave output for the tracking to work. figure 6 shows the coincident output tracking characteristics. ratiometric tracking can be achieved by a few simple calculations and the slew rate value applied to the masters track/ss pin. the track/ss pin has a control range from 0v to 0.6v. the masters track/ss pin slew rate is directly equal to the masters output slew rate in volts/ time. the equation: mr sr ? 60.4k = r t where mr is the masters output slew rate and sr is the slaves output slew rate in volts/time. when coincident tracking is desired, then mr and sr are equal, thus r tb is equal to 60.4k. r b is derived from equation: r b = 0.6v v fb 60.4k + v fb r fb (slave) C v track r tb where v fb is the feedback voltage reference of the regula- tor, and v track is 0.6v. in ratiometric tracking, a different slew rate maybe desired for the slave regulator. r t can be solved for when sr is slower than mr. make sure that the slave supply slew rate is chosen to be fast enough so that the slave output voltage will reach its final value before the master output. for example, mr = 1.5v/ms, and sr = 1.2v/ms. then r t = 75k. solve for r b to equal 51.1k. for applications that do not require tracking or sequencing, simply tie the track/ss pin to intv cc to let run control the turn on/off. when the run pin is below its threshold or v in is below the undervoltage lockout threshold, then track/ss is pulled low. figure 5. coincident tracking schematic figure 6. coincident output tracking characteristics output voltage time 4603 f06 master output slave output applications in f or m ation v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood mpgm run comp intv cc drv cc track/ss track control pllin ltm4603 r set 40.2k 100k r b 40.2k master output r t 60.4k c out slave output 4603 f05 c in v in f set pgnd sgnd v in
ltm4603/ltm4603-1 15 4603fb run enable the run pin is used to enable the power module. the pin has an internal 5.1v zener to ground. the pin can be driven with a logic input not to exceed 5v. the run pin can also be used as an undervoltage lock out (uvlo) function by connecting a resistor divider from the input supply to the run pin: v uvlo = r1 + r2 r2 ? 1.5v see the simplified block diagram (figure 1). power good the pgood pin is an open-drain pin that can be used to monitor valid output voltage regulation. this pin monitors a 10% window around the regulation point and tracks with margining. comp pin this pin is the external compensation pin. the module has already been internally compensated for most output volt- ages. table 2 is provided for most application requirements. ltpowercad is available for control loop optimization. pllin the power module has a phase-locked loop comprised of an internal voltage controlled oscillator and a phase detector. this allows the internal top mosfet turn-on to be locked to the rising edge of an external clock. the frequency range is 30% around the operating frequency of 1mhz. a pulse detection circuit is used to detect a clock on the pllin pin to turn on the phase-locked loop. the pulse width of the clock has to be at least 400ns and the amplitude at least 2v. the pllin pin must be driven from a low impedance source such as a logic gate located close to the pin. during start-up of the regulator, the phase-locked loop function is disabled. intv cc and drv cc connection an internal low dropout regulator produces an internal 5v supply that powers the control circuitry and drv cc for driving the internal power mosfets. therefore, if the system does not have a 5v power rail, the ltm4603 can be directly powered by vin. the gate driver current through the ldo is about 20ma. the internal ldo power dissipation can be calculated as: p ldo_loss = 20ma ? (v in C 5v) the ltm4603 also provides the external gate driver voltage pin drv cc . if there is a 5v rail in the system, it is recom- mended to connect the drv cc pin to the external 5v rail. this is especially true for higher input voltages. do not apply more than 6v to the drv cc pin. a 5v output can be used to power the drv cc pin with an external circuit as shown in figure 16. parallel operation of the module the ltm4603 device is an inherently current mode con - trolled device. parallel modules will have very good current sharing. this will balance the thermals on the design. the voltage feedback equation changes with the variable n as modules are paralleled: v out = 0.6v 60.4k n + r fb r fb or equivalently, r fb = 60.4k n v out 0.6v ? 1 where n is the number of paralleled modules. thermal considerations and output current derating the power loss curves in figures 7 and 8 can be used in coordination with the load current derating curves in figures 9 to 12, and figures 13 to 14 for calculating an approximate ja for the module with various heat sinking methods. thermal models are derived from several tem - perature measurements at the bench and thermal modeling analysis. thermal application note 103 provides a detailed explanation of the analysis for the thermal models and the derating curves. tables 3 and 4 provide a summary of the equivalent ja for the noted conditions. these equivalent ja parameters are correlated to the measured values, applications in f or m ation
ltm4603/ltm4603-1 16 4603fb ambient temperature (c) 70 0 maximum load current (a) 1 2 3 4 5 6 75 80 85 90 4603 f11 95 12v in , 1.5v out , 0lfm 12v in , 1.5v out , 200lfm 12v in , 1.5v out , 400lfm figure 10. bga heat sink 5v in figure 11. no heat sink 12v in figure 12. bga heat sink 12v in figure 13. 12v in , 3.3v out no heat sink figure 14. 12v in , 3.3v out bga heat sink ambient temperature (c) 75 0 maximum load current (a) 1 2 3 4 5 6 80 85 90 95 4603 f10 5v in , 1.5v out , 0lfm 5v in , 1.5v out , 200lfm 5v in , 1.5v out , 400lfm ambient temperature (c) 70 0 maximum load current (a) 1 2 3 4 5 6 75 80 85 90 4603 f12 95 12v in , 1.5v out , 0lfm 12v in , 1.5v out , 200lfm 12v in , 1.5v out , 400lfm ambient temperature (c) 70 0 maximum load current (a) 1 2 3 4 5 6 75 80 85 90 4603 f13 95 12v in , 3.3v out , 0lfm 12v in , 3.3v out , 200lfm 12v in , 3.3v out , 400lfm ambient temperature (c) 70 0 maximum load current (a) 1 2 3 4 5 6 75 80 85 90 4603 f14 95 12v in , 3.3v out , 0lfm 12v in , 3.3v out , 200lfm 12v in , 3.3v out , 400lfm applications in f or m ation figure 7. 1.5v power loss figure 8. 3.3v power loss figure 9. no heat sink 5v in ambient temperature (c) 75 0 maximum load current (a) 1 2 3 4 5 6 80 85 90 95 4603 f09 5v in , 1.5v out , 0lfm 5v in , 1.5v out , 200lfm 5v in , 1.5v out , 400lfm load current (a) 0 2.0 2.5 3.5 3 5 4603 f07 1.5 1.0 1 2 4 6 7 0.5 0 3.0 power loss (w) 20v in 12v in 5v in load current (a) 0 2.0 2.5 3.5 3 5 4603 f08 1.5 1.0 1 2 4 6 7 0.5 0 3.0 power loss (w) 20v in 12v in
ltm4603/ltm4603-1 17 4603fb table 2. output voltage response versus component matrix (refer to figure 18) typical measured values c out1 vendors part number c out2 vendors part number taiyo yuden jmk316bj226ml-t501 (22f, 6.3v) sanyo poscap 6tpe220mil (220f, 6.3v) taiyo yuden jmk325bj476mm-t (47f, 6.3v) sanyo poscap 2r5tpe330m9 (330f, 2.5v) tdk c3225x5r0j476m (47f, 6.3v) sanyo poscap 4tpe330mcl (330f, 4v) v out (v) c in (ceramic) c in (bulk) c out1 (ceramic) c out2 (bulk) v in (v) droop (mv) peak to peak (mv) recovery time (s) load step (a/s) r set (k w ) 1.2 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 5 34 68 30 3 60.4 1.2 2 10f 25v 150f 35v 1 47f 6.3v 330f 2.5v 5 22 40 26 3 60.4 1.2 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 5 20 40 24 3 60.4 1.2 2 10f 25v 150f 35v 4 47f 6.3v none 5 32 60 18 3 60.4 1.2 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 12 34 68 30 3 60.4 1.2 2 10f 25v 150f 35v 1 47f 6.3v 330f 2.5v 12 22 40 26 3 60.4 1.2 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 12 20 39 24 3 60.4 1.2 2 10f 25v 150f 35v 4 47f 6.3v none 12 29.5 55 18 3 60.4 1.5 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 5 35 70 30 3 40.2 1.5 2 10f 25v 150f 35v 1 47f 6.3v 330f 2.5v 5 25 48 30 3 40.2 1.5 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 5 24 47.5 26 3 40.2 1.5 2 10f 25v 150f 35v 4 47f 6.3v none 5 36 68 26 3 40.2 1.5 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 12 35 70 30 3 40.2 1.5 2 10f 25v 150f 35v 1 47f 6.3v 330f 2.5v 12 25 48 30 3 40.2 1.5 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 12 24 45 26 3 40.2 1.5 2 10f 25v 150f 35v 4 47f 6.3v none 12 32.6 61.9 26 3 40.2 1.8 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 5 38 76 37 3 30.1 1.8 2 10f 25v 150f 35v 1 47f 6.3v 330f 2.5v 5 29.5 57.5 30 3 30.1 1.8 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 5 28 55 26 3 30.1 1.8 2 10f 25v 150f 35v 4 47f 6.3v none 5 43 80 26 3 30.1 1.8 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 12 38 76 37 3 30.1 1.8 2 10f 25v 150f 35v 1 47f 6.3v 330f 2.5v 12 28 55 30 3 30.1 1.8 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 12 27 52 26 3 30.1 1.8 2 10f 25v 150f 35v 4 47f 6.3v none 12 36.4 70 26 3 30.1 2.5 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 5 38 78 40 3 19.1 2.5 2 10f 25v 150f 35v 1 47f 6.3v 330f 4v 5 37.6 74 34 3 19.1 2.5 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 5 39.5 78.1 28 3 19.1 2.5 2 10f 25v 150f 35v 4 47f 6.3v none 5 66 119 12 3 19.1 2.5 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 12 38 78 40 3 19.1 2.5 2 10f 25v 150f 35v 1 47f 6.3v 330f 4v 12 34.5 66.3 34 3 19.1 2.5 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 12 35.8 68.8 28 3 19.1 2.5 2 10f 25v 150f 35v 4 47f 6.3v none 12 50 98 18 3 19.1 3.3 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 7 42 86 40 3 13.3 3.3 2 10f 25v 150f 35v 1 47f 6.3v 330f 4v 7 47 89 32 3 13.3 3.3 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 7 50 94 28 3 13.3 3.3 2 10f 25v 150f 35v 4 47f 6.3v none 7 75 141 14 3 13.3 3.3 2 10f 25v 150f 35v 1 22f 6.3v 330f 4v 12 42 86 40 3 13.3 3.3 2 10f 25v 150f 35v 1 47f 6.3v 330f 4v 12 47 88 32 3 13.3 3.3 2 10f 25v 150f 35v 2 47f 6.3v 220f 6.3v 12 50 94 28 3 13.3 3.3 2 10f 25v 150f 35v 4 47f 6.3v none 12 69 131 22 3 13.3 5 2 10f 25v 150f 35v 4 47f 6.3v none 15 110 215 20 3 8.25 5 2 10f 25v 150f 35v 4 47f 6.3v none 20 110 217 20 3 8.25 applications in f or m ation
ltm4603/ltm4603-1 18 4603fb table 4. 3.3v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figure 13 12 figure 8 0 none 15.2 figure 13 12 figure 8 200 none 14.6 figure 13 12 figure 8 400 none 13.4 figure 14 12 figure 8 0 bga heat sink 13.9 figure 14 12 figure 8 200 bga heat sink 11.1 figure 14 12 figure 8 400 bga heat sink 10.5 table 3. 1.5v output derating curve v in (v) power loss curve air flow (lfm) heat sink ja (c/w) figures 9, 11 5, 12 figure 7 0 none 15.2 figures 9, 11 5, 12 figure 7 200 none 14 figures 9, 11 5, 12 figure 7 400 none 12 figures 10, 12 5, 12 figure 7 0 bga heat sink 13.9 figures 10, 12 5, 12 figure 7 200 bga heat sink 11.3 figures 10, 12 5, 12 figure 7 400 bga heat sink 10.25 heat sink manufacturer aavid thermalloy part no: 375424b00034g phone: 603-224-9988 applications in f or m ation
ltm4603/ltm4603-1 19 4603fb and are improved with air flow. the case temperature is maintained at 100c or below for the derating curves. this allows for 4w maximum power dissipation in the total module with top and bottom heat sinking, and 2w power dissipation through the top of the module with an approximate jc between 6c/w to 9c/w. this equates to a total of 124c at the junction of the device. safety considerations the ltm4603 modules do not provide isolation from v in to v out . there is no internal fuse. if required, a slow blow fuse with a rating twice the maximum input current needs to be provided to protect each unit from catastrophic failure. layout checklist/example the high integration of ltm4603 makes the pcb board layout very simple and easy. however, to optimize its electri - cal and thermal performance, some layout considerations are still necessary. ? use large pcb copper areas for high current path, in - cluding v in , pgnd and v out . it helps to minimize the pcb conduction loss and thermal stress. ? place high frequency ceramic input and output capaci - tors next to the v in , pgnd and v out pins to minimize high frequency noise. ? place a dedicated power ground layer underneath the unit. ? to minimize the via conduction loss and reduce module thermal stress, use multiple vias for interconnection between top layer and other power layers. ? do not put vias directly on pads. ? if vias are placed onto the pads, the the vias must be capped. ? interstitial via placement can also be used if necessary. ? use a separated sgnd ground copper area for com - ponents connected to signal pins. connect the sgnd to pgnd underneath the unit. figure 15 gives a good example of the recommended layout. frequency adjustment the ltm4603 is designed to typically operate at 1mhz across most input conditions. the f set pin is typically left open. the switching frequency has been optimized for maintaining constant output ripple noise over most operating ranges. the 1mhz switching frequency and the 400ns minimum off time can limit operation at higher duty cycles like 5v in to 3.3v out , and produce excessive inductor ripple currents for lower duty cycle applications such as 20v in to 5v out . the 5v out and 3.3v out drop out curves are modified by adding an external resistor on the f set pin to allow for lower input voltage operation, or higher input voltage operation. signal gnd v out v in gnd c out c in c in c out 4603 f15 figure 15. recommended layout applications in f or m ation
ltm4603/ltm4603-1 20 4603fb example for 5v output ltm4603 minimum on-time = 100ns t on = [(v out ? 10pf)/i fset ], for v out > 4.8v use 4.8v ltm4603 minimum off-time = 400ns t off = t C t on , where t = 1/frequency duty cycle = t on /t or v out /v in equations for setting frequency: i fset = (v in /(3 ? r fset )), for 20v operation, i fset = 201a, t on = [(4.8 ? 10pf)/i fset ], t on = 239ns, where the internal r fset is 33.2k. frequency = (v out /(v in ? t on )) = (5v/(20 ? 239ns)) ~ 1mhz. the inductor ripple current begins to get high at the higher input voltages due to a larger voltage across the inductor. this is noted in the inductor ripple current vs duty cycle graph at ~5a at 25% duty cycle. the inductor ripple current can be lowered at the higher input voltages by adding an external resistor from f set to ground to increase the switching frequency. a 3a ripple current is chosen, and the total peak current is equal to 1/2 of the 3a ripple current plus the output current. the 5v output current is limited to 5a, so total peak current is less than 6.5a. this is below the 7a peak specified value. a 150k resistor is placed from f set to ground, and the parallel combination of 150k and 33.2k equates to 27.2k. the i fset calculation with 27.2k and 20v input voltage equals 245a. this equates to a t on of 196ns. this will increase the switching frequency from 1mhz to ~1.28mhz for the 20v to 5v conversion. the minimum on time is above 100ns at 20v input. since the switching frequency is approximately constant over input and output conditions, then the lower input voltage range is limited to 10v for the 1.28mhz operation due to the 400ns minimum off time. equation: t on = (v out /v in ) ? (1/frequency) equates to a 382ns on time, and a 400ns off time. the v in to v out step-down ratio curve reflects an operating range of 10v to 20v for 1.28mhz operation with a 150k resistor to ground, and an 8v to 16v operation for f set floating. these modifications are made to provide wider input voltage ranges for the 5v output designs while limiting the inductor ripple current, and maintaining the 400ns minimum off time. example for 3.3v output ltm4603 minimum on-time = 100ns t on = [(v out ? 10pf)/i fset ] ltm4603 minimum off-time = 400ns t off = t C t on , where t = 1/frequency duty cycle (dc) = t on /t or v out /v in equations for setting frequency: i fset = [v in /(3 ? r fset )], for 20v operation, i fset = 201a, t on = [(3.3 ? 10pf)/i fset ], t on = 164ns, where the internal r fset is 33.2k. frequency = [v out /(v in ? t on )] = [3.3v/ (20 ?164ns)] ~ 1mhz. the minimum on-time and minimum off-time are within specification at 164ns and 836ns. however, the 4.5v input to 3.3v output circuit will not meet the minimum off-time specification of 400ns (t on = 733ns, frequency = 1mhz, t off = 267ns). solution lower the switching frequency at lower input voltages to allow for higher duty cycles, and meet the 400ns minimum off-time at 4.5v input voltage. the off-time should be about 500ns with 100ns guard band included. the duty cycle for (3.3v/4.5v) = ~73%. frequency = (1 C dc)/t off , or (1 C 0.73)/500ns = 540khz. the switching frequency needs to be lowered to 540khz at 4.5v input. t on = dc/frequency, or 1.35s. the f set pin voltage is 1/3 of v in , and the i fset current equates to 45a with the internal 33.2k. the i fset current needs to be 24a for 540khz operation. a resistor can be placed from v out to f set to lower the effective i fset current out of the f set pin to 24a. the f set pin is 4.5v/3 =1.5v and v out = 3.3v, therefore 82.5k will source 21a into the f set node and lower the i fset current to 24a. this enables the 540khz operation and the 4.5v to 20v input operation for down converting to 3.3v output. the frequency will scale from 540khz to 1.2mhz over this input range. this provides for an effective output current of 5a over the input range. applications in f or m ation
ltm4603/ltm4603-1 21 4603fb figure 17. 3.3v at 5a design figure 16. 5v at 5a design without differential amplifier v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603 r1 392k r4 100k r2 100k r set 13.3k r fset 82.5k margin control c3 100f 6.3v sanyo poscap 4603 f17 v out 3.3v 5a track/ss control c6 100pf c2 10f 25v c1 10f 25v v in f set pgnd sgnd 5% margin v in 4.5v to 20v review temperature derating curve + pgood v out applications in f or m ation v out v fb marg0 marg1 v out_lcl diffv out v osns ? v osns + pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603 r1 392k 1% r fset 150k r set 8.25k c3 100f 6.3v sanyo poscap 4603 f16 v out 5v 5a track/ss control review temperature derating curve c6 100pf refer to table 2 intv cc c2 10f 25v improve efficiency for 12v input c1 10f 25v r4 100k r2 100k v in f set pgnd margin control sgnd 5% margin v in 10v to 20v v out dual cmssh-3c3 sot-323 +
ltm4603/ltm4603-1 22 4603fb figure 19. 2-phase, 2.5v and 1.2v at 6a with coincident tracking figure 18. typical 4.5v to 20vin , 1.5v at 6a design v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603 r5 392k *c11 optional to reduce lc ringing. not needed for low inductance plane connections r2 100k r1 100k r7 60.4k c4 22f 6.3v c5 470f 6.3v 1.2v at 6a 2.5v clock sync 0 phase clock sync 180 phase c6 100pf c6 100pf margin control margin control c1 10f 25v v in 1.2v f set pgnd sgnd ltc6908-1 4.5v to 16v 2-phase oscillator 4603 f19 + + v + gnd set 4 5 6 1 2 3 out1 out2 mod c10 10f 25v v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603 r6 392k r4 100k r3 100k r8 19.1k c7 22f 6.3v c8 470f 6.3v 2.5v at 6a c2 10f 25v v in 2.5v f set pgnd sgnd 4.5v to 16v c3 0.01f + c11* 100f 25v c12 0.1f r11 118k r9 60.4k r10 60.4k v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603 r1 392k r4 100k r2 100k r set 40.2k c out1 22f 6.3v c5 0.01f c out2 470f 6.3v margin control 4603 f18 v out 1.5v 6a clock sync c3 100pf refer to table 2 c in bulk o p t. table 2 c in 10f 25v 2 cer v in f set pgnd sgnd 5% margin v in 4.5v to 20v review temperature derating curve + + pgood v out on/off applications in f or m ation
ltm4603/ltm4603-1 23 4603fb 4-phase, four outputs (3.3v, 2.5v, 1.8v and 1.5v) with coincident tracking v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603 r9 392k r11 100k r10 100k r18 19.1k c16 22f 6.3v c14 10f 25v 2 3.3v 2.5v at 6a r23 60.4k c15 470f 6.3v margin control clock sync 2 c18 100pf refer to table 2 v in f set pgnd sgnd 5% margin + pgood 3.3v 8v to 16v on/off v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603 r14 392k r16 100k r15 100k r13 40.2k c16 22f 6.3v c14 10f 25v 2 3.3v r25 60.4k c15 470f 6.3v margin control 1.5v at 6a clock sync 4 c24 100pf refer to table 2 v in f set pgnd sgnd 5% margin + pgood 8v to 16v 3.3v on/off v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603 r1 392k r3 100k r2 100k r12 30.1k c3 22f 6.3v c2 10f 25v 2 3.3v r21 60.4k r19 30.1k c4 470f 6.3v margin control 1.8v at 6a clock sync 3 c8 100pf refer to table 2 v in f set pgnd sgnd 5% margin + pgood 8v to 16v on/off r17 59k c26 0.1f ltc6902 4-phase oscillator 3.3v at 5a v + div ph out1 out2 set mod gnd out4 out3 v out v fb marg0 marg1 v out_lcl diffv out v osns + v osns ? pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603 r27 392k r7 100k r6 100k r8 13.3k c9 22f 6.3v c7 0.15f c8 10f 25v 2 c11 100f 35v opt c10 470f 6.3v margin control track/ss control clock sync 1 c12 100pf refer to table 2 v in f set pgnd sgnd 5% margin + pgood 3.3v or appropriate 3.3v 8v to 16v 8v to 16v on/off + intermediate bus ?48v input r24 19.1k r26 40.2k t ypical a pplication
ltm4603/ltm4603-1 24 4603fb notes: 1. dimensioning and tolerancing per asme y14.5m-1994 2. all dimensions are in millimeters land designation per jesd mo-222, spp-010 5. primary datum -z- is seating plane 6. the total number of pads: 118 4 3 details of pad #1 identifier are optional, but must be located within the zone indicated. the pad #1 identifier may be either a mold or marked feature symbol aaa bbb eee tolerance 0.10 0.10 0.03 2.72 ? 2.92 detail b detail a detail b substrate mold cap 0.27 ? 0.37 2.45 ? 2.55 bbb z z 15 bsc top view 15 bsc 4 pad 1 corner x y aaa z aaa z 13.97 bsc 1.27 bsc 13.97 bsc 0.12 ? 0.28 2 3 4 5 6 7 8 9 10 11 bottom view c(0.30) pad 1 3 pads see notes 1 suggested solder pad layout top view 12 a b c d e f g h k j l m detail a 0.60 ? 0.66 0.60 ? 0.66 m yxeee 0.0000 0.6350 0.6350 1.9050 1.9050 3.1750 3.1750 4.4450 4.4450 5.7150 5.7150 6.9850 6.9850 6.9850 5.7150 5.7150 4.4450 4.4450 3.1750 3.1750 1.9050 1.9050 0.6350 0.6350 0.0000 6.9850 lga 118 0306 rev ? lga package 118-lead (15mm 15mm) (reference ltc dwg # 05-08-1801 rev ?) p ackage description please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
ltm4603/ltm4603-1 25 4603fb information furnished by linear technology corporation is believed to be accurate and reliable. however, no responsibility is assumed for its use. linear technology corporation makes no representa - tion that the interconnection of its circuits as described herein will not infringe on existing patent rights. r evision h istory rev date description page number b 8/11 updated note 2 test parameters. updated the usage of remote sense amplifier pins. updated the f set pin description. updated the simplified block diagram. added additional information for the tracking applications. updated the frequency adjustment section and equations. updated the example circuits. added a package photo. updated the related parts information. 4 7 8 9 14 19, 20 22, 23 26 26 (revision history begins at rev b)
ltm4603/ltm4603-1 26 4603fb ? linear technology corporation 2007 lt 0811 rev b ? printed in usa linear technology corporation 1630 mccarthy blvd., milpitas, ca 95035-7417 (408) 432-1900 fax : (408) 434-0507 www.linear.com r elate d p arts part number description comments ltm4628 dual 8a, 26v, dc/dc module regulator 0.6v v out 5v, remote sense amplifier, internal temperature sensing output, 15mm 15mm 4.32mm lga ltm4627 20v, 15a dc/dc module regulator 0.6v v out 5v, pll input, remote sense amplifier, v out tracking, 15mm 15mm 4.32mm lga ltm4618 26v, 6a dc/dc module regulator 0.8v v out 5v, pll input, v out tracking, 9mm 15mm 4.32mm lga ltm4606 28v, 6a en55022 class b dc/dc module regulator 0.6v v out 5v, pll input, v out tracking and margining, 15mm 15mm 2.82mm lga ltm4601ahv 28v, 12a dc/dc module regulator 0.6v v out 5v, pll input, remote sense amplifier, v out tracking and margining, 15mm 15mm 2.82mm lga ltm8025 36v in , 3a dc/dc module regulator 0.8v v out 24v, clk input, 9mm 15mm 4.32mm lga package ltm6908 50khz to 10mhz dual output oscillator 90 or 180 phase shift between outputs, optional spread spectrum frequency modulation, 2mm 3mm dfn t ypical a pplication 3.3v at 5a, ltm4603-1 (no remote sense amplifier) v out v fb marg0 marg1 v out_lcl nc3 nc2 nc1 pgood mpgm run comp intv cc drv cc track/ss pllin ltm4603-1 r1 392k r4 100k r2 100k r set 13.3k r fset 82.5k margin control c3 100f 6.3v 4603 ta05 v out 3.3v 5a track/ss control c6 100pf c2 10f 35v c1 10f 35v v in f set pgnd sgnd 5% margin v in 4.5v to 20v review temperature derating curve + pgood p ackage p hotograph 15mm 15mm 2.82mm

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